Technology

IBM Unveils Revolutionary Mainframe Chip: First to Seamlessly Handle Arm and Z Workloads on Identical Cores

At the Hot Chips conference today, IBM revealed a groundbreaking advancement in mainframe technology: a new processor that can seamlessly execute both IBM’s proprietary instruction set and Arm’s, switching between them in mere nanoseconds.

This innovative chip, poised to drive the next generation of IBM Z and LinuxONE systems, is the first of its kind, enabling businesses to utilize the extensive and rapidly expanding ecosystem of Arm-native Linux applications. This capability includes AI frameworks that are increasingly integral to contemporary infrastructures, running alongside the traditional z/OS workloads that support the operations of major banks, insurance firms, and governmental institutions.

“As technology enthusiasts, we’re thrilled to introduce what could be among the most powerful commercially available dual-architecture processors,” said Tina Tarquinio, chief product officer for IBM Z and LinuxONE, in an exclusive pre-announcement interview.

This launch represents the initial hardware achievement from the strategic partnership between IBM and Arm announced earlier this year. It directly addresses a long-standing concern regarding whether mainframes, essential for processing a significant portion of global financial transactions, can maintain relevance in an AI-centric world dominated by other hardware technologies.

A schematic of IBM’s innovative processor, the first dual-architecture chip capable of natively supporting both IBM’s and Arm’s instruction sets. Each of its 11 cores can switch architectures in nanoseconds. (Credit: IBM)

Innovative Design of a Processor That Embraces Two Instruction Sets

One of the most notable engineering choices made by IBM was opting against a simpler method. Rather than adding a few standalone Arm cores to the existing processor, IBM developed each core to be bilingual.

“The chip contains 11 cores, each capable of dynamically alternating between Arm software mode and traditional Z software mode,” explained Jacobi in an exclusive interview. “This allows critical enterprise applications to run alongside the diverse suite of Arm software.”

This innovative approach utilizes the open-source KVM hypervisor, allowing both Arm64 Linux and Linux on Z virtual machines to operate simultaneously. As each virtual machine is assigned to a physical core, that core shifts into the appropriate mode. “The transition takes place in the nanosecond range,” noted Jacobi. “Given that each virtual machine runs for many milliseconds, the switching overhead is practically negligible.”

Conventional z/OS workloads function in a separate section on the same chip, meaning that essential banking operations and modern Arm-native monitoring can utilize the same core, memory, and reliability assurances. Jacobi acknowledged that IBM considered simpler alternatives but ultimately decided against them. “Adding loosely-coupled Arm cores would not meet customer needs,” he explained. “Integration into the system design was essential to preserve service quality.”

The specifications of this processor demonstrate that it is a top-tier design. Utilizing a cutting-edge 2-nanometer manufacturing process, the chip operates its 11 high-performance cores at a base frequency exceeding 5.7 GHz—remarkably rapid by industry standards. It also includes on-chip AI inferencing units for fraud detection during transactions, a dedicated data processing unit for acceleration, and an extensive cache system. Full systems can scale to multiple hundreds of cores and tens of terabytes of memory. “This performance is exceptional compared to what’s available elsewhere in the industry,” Jacobi emphasized.

Understanding the Need for Arm’s Developer Ecosystem

The reasoning behind the chip is fundamentally software-based rather than hardware-centric. IBM’s s390x architecture underpins a vast number of mission-critical transactions globally, but the wider realm of enterprise software—including monitoring tools, security agents, and cloud-native middleware—was predominantly built for x86 and increasingly for Arm. According to Arm’s estimates, close to half of the computing resources shipped to major cloud service providers in 2025 will be Arm-based, fueled by the likes of AWS, Google, and Microsoft. Moreover, there are over 22 million developers proficient in Arm globally.

Adapting each application for the s390x architecture has been a time-consuming endeavor, which Tarquinio candidly discussed. “Despite our dedicated ecosystem team, we could never manage to port every application on our own,” she remarked. “Hence, we aimed for a significant leap forward technologically.”

Interestingly, customers weren’t explicitly requesting a dual-architecture chip. Instead, they sought solutions for quicker deployment of various workloads. “Clients aren’t asking, ‘Can you create a dual-architecture environment?’ Rather, they are saying, ‘Help us run a variety of workloads more expediently,'” she explained.

The compatibility claim is ambitious: Arm Linux binaries are intended to function without modification. “Our new Arm functionalities aim for 100% binary compatibility,” Jacobi mentioned. “For instance, applications developed for Red Hat Linux on Arm will run natively without changes.” Arm provides the instruction set architecture and validation tools to ensure that IBM’s implementation matches every other Arm chip, while IBM handles the design and manufacturing of the silicon in-house. “This showcases a strong engineering partnership,” noted Jacobi.

Implications of the New Spyre Accelerator for AI on Mainframes

IBM is also introducing the next generation of its Spyre AI accelerator at the conference, which is deliberately aligned with the new chip. The current architecture includes two levels of AI: an on-processor accelerator for ultra-low-latency functions like fraud detection during transactions and the Spyre accelerator card designed for more extensive models.

The new Spyre promises substantial improvements. “This higher-performance chip can handle large language models for complex workflows,” Jacobi said, enhancing both AI operations that manage the system and business processes, such as document processing and claims assessments. High-bandwidth memory will support these operations.

This dual-architecture innovation and AI advancement are intertwined. Companies are looking to perform inference directly beside their data, which resides on the mainframe, and the majority of the AI tools are built on Arm. Mohamed Awad from Arm articulated this vision: “As AI expands, more of the computing environment is gravitating towards Arm. Integrating Arm compute and its software ecosystem into these platforms will empower enterprises in how they deploy AI.”

The timing aligns well with the current state of enterprise AI. According to McKinsey’s latest survey, while 88% of organizations now leverage AI in some capacity, nearly two-thirds have not yet fully integrated it throughout their organizations. The companies realizing the most value are those that redesign core processes instead of conducting isolated trials. For industries whose foundational systems operate on IBM Z, integrating AI at the point of transaction is arguably the most effective approach.

Launch Timeline and Reassurances for Existing Clients

Patience will be essential for buyers. This chip is set to debut in the successor to the z17 model, expected in the second quarter of 2025. IBM typically maintains a product cycle of about three years, suggesting a launch around 2028. However, Tarquinio reassured stakeholders that the project has moved beyond conceptual stages. “We’re fully committed and progressing swiftly,” she stated, noting that more information will be shared leading up to the launch.

Current IBM customers may wonder if the introduction of Arm signifies a decline in traditional architectures. Both executives strongly refuted this notion. “This is a clear ‘and,’ not an ‘or,'” Tarquinio emphasized. “We have a roadmap that extends 10 to 15 years for hardware systems. Many teams are engaged with this next system, while others work on subsequent iterations.”

Jacobi framed the development as continuity, highlighting that the current z17 system is not merely an advanced version of its predecessor from 25 years ago. “Past versions lacked pervasive encryption and on-processor AI capabilities. Integrating Arm is the next significant step in this ongoing evolutionary process.”

The competitive dynamics with cloud providers remain relevant. When asked why businesses would prefer Arm workloads on a mainframe over cloud alternatives, Tarquinio highlighted the platform’s impressive availability metrics: “We can offer eight nines of availability—equating to just 0.3 seconds of downtime annually. For mission-critical applications, that’s a priority.” The proposal, she asserts, is to fine-tune infrastructure to match service level agreements rather than merely following trends.

Challenges do exist. IBM’s communications indicate that statements regarding future directions are aspirational. Currently, Arm compatibility supports only Linux, and the most challenging tasks—executing a foreign instruction set at production levels with mainframe-level fault tolerance—remain to be tested over the coming two years.

Nonetheless, the ambitions are clear. For sixty years, mainframes have adapted to every technological wave that threatened their existence—from minicomputers and client-server solutions to cloud computing—absorbing what needed to remain relevant. Now IBM aims to achieve an unprecedented level of adaptability: training the most critical transaction-processing machines to fluently handle the demands of the AI age on their own silicon. “Introducing such a pioneering product speaks volumes about IBM’s technological capabilities,” Tarquinio concluded, signaling that the mainframe is not only keeping pace with the future but also poised to lead it.

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